1. Field of the Invention
This application relates to a digital receiver, and more specifically, to turning off digital circuits within the digital receiver according to a received signal strength indicator (RSSI).
2. Description of the Prior Art
In typical receiver system for a digital communication system, there area radio frequency (RF) and analog unit, and a digital signal processing unit. Analog to digital converters (ADC) are used to convey transmitted information from analog domain to digital domain for digital processing and to connect these units in hardware. Within the RF and analog unit, a circuit called RSSI is often included to determine the received signal or interference level within a certain predetermined signal bandwidth. In addition to determining the signal or interference level, RSSI is also used for clear channel assessment and automatic gain control.
In a digital communication system, the transmitted signal must use certain data patterns, for example a predefined preamble, so that the receiver can sync and decode the transmitted signal. However, in the real world, due to noise, interference, and distortion, the transmitted data package can get lost. There are two scenarios resulting in a lost package. The first scenario is missed detection, which means that when the transmitted data package is presented at the receiver, the receiver cannot correctly receive and decode it. The second scenario can occur after a false alarm, which means that when there is no data package presented at the receiver, the digital processing unit mistakenly starts to process a nonexistent package. For example, the digital processing unit may receive an erroneous signal due to noise or the like and begin processing the erroneous signal. Since it takes a certain amount of time for the digital processing unit to determine that the erroneous signal is not a valid packet but a false alarm, if a real data package arrives when the receiver has not yet recovered from the false alarm, missed detection of the real data package may occur.
Please refer to FIG. 1, which illustrates a false alarm scenario 100. In FIG. 1, packets 110 and 130 are being received sequentially from left to right. The first two packets 110 are received and processed normally. At time point 120, a false alarm occurs. Shortly after the false alarm 120 occurs, packet 130 arrives at the receiver. However, detection of the packet 130 is missed because it arrived during a time window shown as Tdrop where the digital processing unit is recovering from the false alarm 120 and is unable to correctly process the packet 130. Therefore, it is very necessary to reduce or remove the above mentioned situation.